SkillsAdd

codejunkie99/gateflow-cli · Archived

SystemVerilog RTL Design

Installation

$ npx skills add https://github.com/codejunkie99/gateflow-cli
View on skills.sh ↗ GitHub repository ↗

Summary

  • Provides RTL design patterns, synthesis guidelines, and coding templates.
  • Use when the user mentions 'module design', 'FSM', 'state machine', 'pipeline', 'synthesizable', 'parameterize', 'parameter', 'localparam', 'clock domain', 'CDC', 'FIFO', 'register file', 'always_ff', 'always_comb', 'generate', or asks about synthesis-related coding.

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Also in this package

Other skills from codejunkie99/gateflow-cli.

npx skills add https://github.com/codejunkie99/gateflow-cli
SystemVerilog Verification 4 SystemVerilog Testbench Patterns 3 SystemVerilog Development 3 SystemVerilog Lint Fixing 3 GateFlow Behavior 2 VCD Waveform Analysis 2

Browse all from codejunkie99/gateflow-cli

More details

Agent compatibility

Declared targets from SKILL.md / docs. Unmarked agents are not listed — the skill may still install via the CLI.

Claude Code Not declared
Cursor Not declared
Codex Not declared
GitHub Copilot Not declared
Windsurf Not declared
Gemini CLI Not declared
Cline Not declared
OpenCode Not declared

Repository health

Stars 3
License LICENSE
Default branch main
Open issues 0
Status Archived

History

  1. First recorded snapshot · 4 installs